The present invention relates to a semiconductor device and, more particularly, to a structure for reducing the influence of a power source noise generated during an operation of an internal circuit.
Today, various electric products are mounted with semiconductor integrated circuits (LSI) such as a micro computer, a memory, and a gate array. As to the LSI, from a view point of size reduction of a package in which the LSI is sealed, there have been studies for reducing the number of pin terminals. As a method to reduce the number of pins, for example, a structure is adopted in which the number of necessary pin terminals is reduced by allowing two or more internal circuits mounted in the LSI to share a common pin terminal (power source pin terminal) for supplying power source voltage.
However, as described above, in the case where there is provided a common power source pin terminal to be shared by the two or more internal circuits, a power source line and a ground line for one internal circuit are electrically coupled with a power source line and a ground line for another internal circuit through the power source pin terminal. Therefore, there is transmitted, to the power source line and the ground line of another internal circuit through the power source pin terminal, a noise (hereafter called a “power source noise”) generated on the power source line and the ground line at the time of an operation of the first internal circuit. This power source noise is a high-frequency component produced by a rapid change in an electric current. With higher integration of LSI in recent years, for reducing power consumption and faster operation, it is commonly performed to lower power source voltage. Therefore, the influence of the power source noise given to the power source voltage becomes greater, which may cause malfunction of other internal circuits.
In order to reduce such an influence of the power source noise, in a semiconductor device disclosed in Japanese Patent Laid-open No. Hei 9 (1997)-205357 (Patent Document 1), for example, there is provided a decoupling capacitor between a power source line and a ground line. The power source noise is absorbed by the decoupling capacitor so that the power source noise is prevented from being transmitted to other internal circuits. Moreover, Patent Document 1 discloses a structure in which there is formed a low pass filter with use of a resistor inserted in the power source line and a capacitor provided between the power source line and the ground line, and the power source noise on the power source line is absorbed by the low pass filter.
[Patent Document 1]
Japanese Patent Laid-open No. Hei 9(1997)-205357
[Patent Document 2]
Japanese Patent Laid-open No. 2003-258612